Integrated circuits, and systems-on-a-chip (SoC) may include multiple independent processing units (a.k.a., “cores”) that read and execute instructions. These multi-core processing chips typically cooperate to implement multiprocessing. To facilitate this cooperation and to improve performance, multiple levels of cache memories may be used to help bridge the gap between the speed of these processors and main memory. However, while powered-up, the circuitry of an integrated circuit (including caches) consumes power. To reduce the power consumption of an integrated circuit, the circuits (i.e., blocks, logic, etc.) of a chip may be divided into multiple clock domains and/or multiple power domains. The multiple domains allow for the turning off of local power supplies to eliminate leakage current and the dynamic scaling of voltages and clock frequencies to reduce operating current.